Transceivers comprise both a transmitter and a receiver, and are commonly used in a variety of communication apparatuses. Transceivers can be arranged to be operated in semi-duplex, i.e. the receiver and transmitter operate separated in time to prevent the transmitter signal from concealing the received signal. This approach is therefore commonly referred to as time division duplex (TDD). Transceivers can also be operated in full duplex, i.e. the receiver and transmitter operate simultaneously wherein some special arrangements are provided to prevent the transmitter from concealing the received signal. One approach to achieve this is to assign different frequencies for transmission and reception. This approach is therefore commonly referred to as frequency division duplex (FDD).
Often the receiver and the transmitter use the same antenna, or antenna system which may comprise several antennas, which implies that some kind of circuitry may be desired to enable proper interaction with the antenna. This circuitry should be made with certain care when operating the transceiver in full duplex since the transmitter signal, although using FDD, may interfere with the received signal, i.e. internal interference within the transceiver. FIG. 1 illustrates an example of a communication apparatus 100 comprising a transceiver 102, an antenna 104 connected to the transceiver 102, and further circuitry 106 such as processing means, input and output circuitry, and memory means. The transceiver 102 comprises a transmitter 108, a receiver 110, and a duplexer 112 which is connected to the transmitter 102, the receiver 110 and the antenna 104. The duplexer 112 is arranged to direct radio frequency (RF) signal from the transmitter to the antenna, as indicated by arrow 114, and from the antenna to the receiver, as indicated by arrow 116, and can for example comprise a circulator. Duplexers are known in the art and for example described in U.S. Pat. No. 4,325,140. Further, duplexers are commonly costly, space consuming and challenging to be implemented on-chip. Therefore, efforts have been made in the art to achieve the similar effects with on-chip solutions. These are commonly based on electrical balance by using a dummy load which is arranged to be equal to the antenna impedance. FIG. 2 illustrates an example of such a structure 200, which is also disclosed in WO 2009/080878 A1, comprising a transmitter 202, a receiver 204, and an antenna 206. The transmitter 202 provides its output signal both to a branch towards the antenna 206, the branch comprising a capacitor 208 and an inductor 210, and to a branch towards a dummy load 212, the branch comprising a capacitor 208′ and an inductor 210′. The dummy load 212 is arranged to mimic the impedance of the antenna 206, and by the achieved symmetry, and, when using a differential input to the receiver 204 via a transformer 214, the contribution at the receiver input from the transmitted signal can be suppressed. Such solutions will result in relatively large insertion loss.